A 0.6-V 11-uW PVT tolerant DTMOS inverter based OTA

Authors : Mesut ATASOYU

Pages : 224-229

Doi:10.17694/bajece.1005797

View : 24 | Download : 11

Publication Date : 2022-04-30

Article Type : Research Paper

Abstract :This paper presents the design of a process-voltage-temperature insert ignore into journalissuearticles values(PVT); variation tolerant inverter-based operational transconductance amplifier insert ignore into journalissuearticles values(OTA); employing both a dynamic threshold MOS insert ignore into journalissuearticles values(DTMOS); technique and a constant voltage biasing insert ignore into journalissuearticles values(CVB); scheme. The proposed inverter-based OTA offers a higher bandwidth due to implemented DTMOS technique, which realizes higher input transconductance value than a conventional inverter-based OTA design. Simulation results show that the proposed OTA achieves superior slow-slow insert ignore into journalissuearticles values(SS); corner performance under PVT variations than the conventional inverter-based OTA while consuming only 11-uW and providing a figure of merit insert ignore into journalissuearticles values(FoM); of 7.0-MHz.pF/uA. As a result, DC gain and unity-gain bandwidth insert ignore into journalissuearticles values(UGBW); of the proposed OTA improve by 27% and 32% at SS corner under the PVT variations, respectively.
Keywords : DTMOS, Inverter based OTA, PVT tolerant