A Ladder Multilevel Inverter Topology with Reduction of On-state Voltage Drop

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Gazi University Journal of Science Part A: Engineering and Innovation
Volume:1 Issue:1
A Ladder Multilevel Inverter Topology with Reduction of On-state Voltage Drop

A Ladder Multilevel Inverter Topology with Reduction of On-state Voltage Drop

Authors : Mohamad BANAEI, Ebrahim SALARY, Hossein KHOUNJAHAN

Pages : 1-9

View : 51 | Download : 10

Publication Date : 2013-03-31

Article Type : Other Papers

Abstract :In this paper, a generalized symmetrical multilevelinverter namely ladder multilevel inverter insert ignore into journalissuearticles values(LMI); is proposed. The LMI can generate DC voltage levels and voltage harmonic similar to other topologies withless number of switches and gate drivers. In addition, as compare to traditional multilevel inverter, LMI has less on-state voltage drop and conduction losses, because three switches are turned on at any given time. The proposed topology results in reduction of installation area and cost and has simplicity of control system. This converter has been used in a dynamic voltage restorer insert ignore into journalissuearticles values(DVR);. The operation and performance of the proposed LMI has been verified by experimental and simulation results. Thesimulation results show its capability in voltage generation and voltage sag compensation.
Keywords : Ladder multilevel inverter, Symmetrical cascade, Reduction of on state voltage drop

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