- Balkan Journal of Electrical and Computer Engineering
- Volume:6 Issue:1
- FPGA Schematic Implementations and Comparison of FIR Digital Filter Structures
FPGA Schematic Implementations and Comparison of FIR Digital Filter Structures
Authors : Oğuzhan COŞKUN, Kemal AVCI
Pages : 20-28
Doi:10.17694/bajece.369234
View : 39 | Download : 11
Publication Date : 2018-02-15
Article Type : Research Paper
Abstract :In this study, we investigate the FPGA schematic implementations of finite impulse response insert ignore into journalissuearticles values(FIR); digital filters for three fundamental structures on Altera DE2-115 board without requiring any other software packages such as DSP Builder and Matlab Simulink. First of all, a low pass FIR digital filter is designed by using Matlab filter design and analysis tool insert ignore into journalissuearticles values(fdatool); program. Then, the designed filter is implemented and simulated on Matlab for a given input signal. After that, for three fundamental structures insert ignore into journalissuearticles values(namely direct-form, transposed direct-form, and symmetric direct-form); in literature, the designed filter is implemented schematically on Quartus-II software and then each project containing different structure implementation is compiled. Then, the digital filters implemented by each structure are simulated by University Program Vector Wave File insert ignore into journalissuearticles values(VWF); simulation program on Quartus-II software. Simulation results show that the obtained results are the same as the ones obtained on Matlab, which confirms that the schematic designs are successfully implemented. Moreover, the implemented digital filters are realized and successfully tested on Altera DE2-115 FPGA board. Finally, three fundamental FIR structures for various filter lengths from 11 to 51 are implemented to compare them in terms of total logic elements, total registers, and total memory.Keywords : Altera DE2 115, FIR filter, FPGA, Matlab, Quartus II
ORIGINAL ARTICLE URL
