Reduction of Output Impedance of Buck Converter with Genetic Algorithm

Authors : Farzin ASADİ

Pages : 317-322

Doi:10.17694/bajece.1096188

View : 26 | Download : 12

Publication Date : 2022-07-30

Article Type : Research Paper

Abstract :This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control insert ignore into journalissuearticles values(VMC); without requiring low Equivalent Series Resistance insert ignore into journalissuearticles values(ESR); output capacitors. Proposed technique uses the infinity norm insert ignore into journalissuearticles values( ); to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm insert ignore into journalissuearticles values(GA);. The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode insert ignore into journalissuearticles values(CCM);. Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.
Keywords : DC DC converters, load transients, output impedance of buck converter, State Space Averaging SSA,