An alternative carry-save arithmetic for new generation field programmable gate arrays

Authors : UĞUR ÇİNİ, MUSTAFA AKTAN, AVNİ MORGÜL

Pages : 435-447

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Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :In this work, a double carry-save addition operation is proposed, which is efficiently synthesized for 6-input LUT-based field programmable gate arrays insert ignore into journalissuearticles values(FPGAs);. The proposed arithmetic operation is based on redundant number representation and provides carry propagation-free addition. Using the proposed arithmetic operation, a compact and fast multiply and accumulate unit is designed. To our knowledge, the proposed design provides the fastest multiply-add operation for 6-input LUT-based FPGA systems. A finite impulse response filter implementation is given to show the performance of the proposed structure. The proposed implementation provides a dramatic performance increase, which is at least 2 times faster than conventional binary multiply-add implementations.
Keywords : Digital arithmetic, redundant numbers, FPGA, FIR filters