The reduction of semiconductor devices in a flying capacitor-based multilevel converter for use as an SSSC

Authors : Mana ROKHAFROOZ, Ali MOSALLANEJAD

Pages : 3752-3763

View : 14 | Download : 8

Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :This paper proposes the use of a static synchronous series compensator insert ignore into journalissuearticles values(SSSC); to increase the power capacity of a 230 KV transmission line. The power capacity is increased by 30%. The proposed SSSC is a 21-level inverter based on the cascade connection of improved double flying capacitor multicell insert ignore into journalissuearticles values(CI-DFCM); converter. The main advantages of the CI-DFCM multilevel inverter are the low number of power-electronic devices, as well as reduction in the number and voltage diversity of flying capacitors in comparison with other flying capacitor-based inverters. The CI-DFCM multilevel inverter uses only two flying capacitors in each phase. The theory of instantaneous p-q power is applied to control the proposed SSSC. By applying the presented control method, the dc-link capacitors are charged to the desired voltage value. The modulation method of the CI-DFCM multilevel inverter is a modified phase shifted pulse width modulation insert ignore into journalissuearticles values(PS-PWM); technique. In order to validate the accurate performance of the proposed compensator, a three-phase transmission line with the transmitted active power of 160 MW is simulated. The simulation results are provided by MATLAB/Simulink.
Keywords : Static synchronous series compensator, improved double flying capacitor multicell, cascade connection of improved double flying capacitor multicell, theory of instantaneous p q power, phase shifted pulse width modulation