A novel efficient TSV built-in test for stacked 3D ICs

Authors : Badi GUIBANE, Belgacem HAMDI, Brahim Ben SALEM, Abdellatif MTIBAA

Pages : 1909-1921

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Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :A through-silicon via insert ignore into journalissuearticles values(TSV); is established as the main enabler for a three-dimensional integrated circuit insert ignore into journalissuearticles values(3D IC); that increases system density and compactness. The exponential increase in TSV density led to TSV-induced catastrophic and parametric faults. We propose an original architecture that detects errors caused by TSV manufacturing defects. The proposed design for testability is a built-in technique that detects errors in an early manufacturing stage and is hence very economically attractive. The proposal is capable of testing each and every TSV in the network. The technique achieves high fault coverage and high observability.
Keywords : 3D IC, through silicon via, built in current sensor, built in self test, design for testability, test access mechanism