Effects of SILAR cycle on the electrical characteristics of Cd/CdSe/n-Si/Au-Sb structure

Authors : Betül GÜZELDİR, Mustafa Sağlam And Aytunç ATEŞ

Pages : 1-12

Doi:10.3906/kim-1202-65

View : 19 | Download : 6

Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :Cd/CdSe/n-Si/Au-Sb structures have been fabricated by Successive Ionic Layer Adsorption and Reaction insert ignore into journalissuearticles values(SILAR); method under various SILAR cycles. The characteristics parameters of these structures such as barrier height, ideality factor, series resistance are calculated from the current-voltage insert ignore into journalissuearticles values(I-V); measurements and the barrier height, carrier concentration are calculated from reverse bias capacitance-voltage insert ignore into journalissuearticles values(C-V); measurements at 300 kHz frequency and room temperature. Furthermore, the density distribution and rectifying ratio of these structure have been calculated from the I-V measurements as a function of SILAR cycle. It has been seen that the changes of characteristic parameters such as barrier height, ideality factor and series resistance of the Cd/CdSe/n-Si/Au-Sb structures have lightly changed with increasing SILAR cycle.
Keywords : CdSe, SILAR method, sandwich structure